Vol. 5 No. 2 (2019)

Articles

• XOR FREE ADVENT OF CONVOLUTION ENCODER IMPLEMENTATION

  Jaladurgam Venkata Anjan Kumar, P M Naseer Hussain

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• AN ULTRA-HIGH THROUGHPUT AND FULLY PIPELINED IMPLEMENTATION OF MODIFIED-AES ALGORITHM ON FPGA

  V Narendra Babu, Jakkidi Vamshi Kanth Reddy

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• DESIGN AND IMPLEMENTATION OF AN OPTIMIZED BIST BASED RADIX-4 BOOTH MULTIPLIER

  Kurukuti Naresh, S Siddeswara Reddy

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• DESIGN OF CARRY SELECT ADDER FOR LOW POWER AND HIGH SPEED VLSI APPLICATIONS USING HYBRID ADDER

  Gudiselapalli Jagan, S. Siddeswara Reddy

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• NOVEL ARCHITECTURE FOR OPTIMIZED IMPLEMENTATION OF BLOWFISH ALGORITHM FOR HIGH SECURITY APPLICATIONS

  Pavan Kumar Reddy Atla, Mr. C Jayarama Krishna

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