XOR FREE ADVENT OF CONVOLUTION ENCODER IMPLEMENTATION
This work presents a new algorithm to construct an XOR-Free architecture of a power efficient Convolution Encoder. Optimization of XOR operators is the main concern while implementing polynomials over GF (2), which consumes a significant amount of dynamic power. The proposed approach completely removes the XOR-processing operation of a chosen non-systematic, feed-forward generator polynomial and reduces the logical operators, thereby the decoding cost.
Index Terms: Convolution Codes, Common Sub expression Elimination, Finite State Machine, Forward Error Correction, FPGA, HDL, Modulo Adder.
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