DESIGN OF CARRY SELECT ADDER FOR LOW POWER AND HIGH SPEED VLSI APPLICATIONS USING HYBRID ADDER
Abstract
In this paper, Carry Select Adder (CSA) structures are proposed utilizing parallel prefix adders. Rather than utilizing double Ripple Carry Adders (RCA), parallel prefix Adder i.e., Koggestone (KSA) Adder is utilized to outline Regular Linear CSA. Adders are the essential building hinders in computerized coordinated circuit based outlines. Swell Carry Adder (RCA) gives the most minimized outline however takes longer calculation time. The time basic applications utilize Carry Look-ahead plan (CLA) to infer quick outcomes yet they prompt increment in zone. Convey Select Adder is a bargain among RCA and CLA in term of region and deferral. Deferral of RCA is vast subsequently we have supplanted it with parallel prefix Adder which gives quick outcomes. In this paper, structures of 32-Bit Regular Linear Koggestone CSA, Modified Linear KS CSA, Regular Square Root (SQRT) KSA CSA and Modified SQRT KS CSA are outlined. Power and deferral of all these Adder structures are computed at various information voltages. The outcomes portray that Modified SQRT BK CSA is superior to anything the various Adder models as far as power however with little speed punishment.
Keywords: Brent Kung (BK) adder, Ripple Carry Adder (RCA), Regular Linear Brent Kung Carry Select Adder, Modified Linear BK Carry Select Adder, Regular Square Root (SQRT) BK CSA and Modified SQRT BK CSA, Regular Linear Koggestone Carry Select Adder, Modified Linear KS Carry Select Adder, Regular Square Root (SQRT) KS CSA and Modified SQRT KS CSA.
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International Journal of Engineering Science and Generic Research (IJESAR) by Articles is licensed under a Creative Commons Attribution 4.0 International License.