RF Front-end Design of a Digital TV Receiver

Authors

  • D. Sony Dr.G.V. Mahalakshmi Department of Electronics and Communication Engineering Sreenidhi Institute of Science and Technology, Hyderabad-501301

Abstract

This paper presents a RF Front-end of Digital TV Receiver the frequency swept from 100MHz to 1.2GHz in CMOS process. This Front-end is designed by using Inverter with Self bias Current reuse LNA and Mixer which consumes power of 14.79 mw from 1.8V supply. The Front-end has good linearity 1dB compression point is -33.7 dBm, Input-referred third-order intercept point (IIP3) is -11.54 dBm.It has low Noise figure of 4 dB ,S11 is -16 dB and high gain .So it is suitable for Digital TV applications Keywords: self bias, current reuse,1 dB compression point and input-referred third-order intercept point

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Published

2016-10-30

How to Cite

Dr.G.V. Mahalakshmi, D. S. (2016). RF Front-end Design of a Digital TV Receiver. International Journal of Engineering Science and Generic Research, 2(5). Retrieved from https://ijesar.in/index.php/ijesar/article/view/33

Issue

Vol. 2 No. 5 (2016)

Section

Articles

License

Creative Commons LicenseInternational Journal of Engineering Science and Generic Research (IJESAR) by Articles is licensed under a Creative Commons Attribution 4.0 International License.