Design of High Performance S-Box for AES 256 Bit using Galois Field (28)

Authors

  • Sulla Ravali PG Scholar, Dept of ECE, MRCET, Hyderabad, India.
  • Arunkumar Madupu PhD Scholar, Dept of ECE, GITAM Deemed to be University, Visakhapatnam, India

Abstract

The Advanced Encryption Standard (AES) is considered to be the strongest encryption technique in cryptography. Advanced Encryption Standard (AES) is a symmetric key block cipher which will encrypt as well as decrypt the data block. The pre-computed values stored in a ROM based lookup table. In this implementation, all 256 values are stored in a ROM such implementation is expensive in terms of hardware. A more refined way of implementing the Substitution Box (S-Box) by using Composite field method through combinational logic.  This S-Box has the advantage of having small area occupancy. Hence it delivers high throughput optimizes the delay and reduces the area. The 256-bit Advanced Encryption Standard (AES) of fully Pipelined AES with Compact S-Box is simulated and synthesized by Xilinx 14.7v tool.

Keywords: VLSI, AES, Encryption, Decryption.

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Published

2018-07-09

How to Cite

Ravali, S., & Madupu, A. (2018). Design of High Performance S-Box for AES 256 Bit using Galois Field (28). International Journal of Engineering Science and Generic Research, 4(4). Retrieved from https://ijesar.in/index.php/ijesar/article/view/128

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Articles