Symmetric transparent BIST for memory using March X algorithm

Authors

  • 1G Dhanalakshmi, 2 SK SIRAJ 1M.TECH, VLSI& EMBEDDED SYSTEM, QIS College of Engineering & Technology, JNTUK, A.P, India 2 Asst. Professor, Dept. of Electronics and Communication Engineering, QIS College of Engineering & Technology, JNTUK, A.P, India

Abstract

Symmetric Transparent BIST schemes for RAM modules assure the preservation of the memory contents during periodic testing while at the same time skipping the signature prediction phase required in transparent BIST schemes, achieving considerable reduction in test time. In this work the utilization of accumulator modules comprising adders implementing binary addition is proposed and BIST is implementing with Symmetric March X algorithm.

Keywords: online BIST, symmetric, SOC

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Published

2017-10-30

How to Cite

SIRAJ, 1G D. 2 S. (2017). Symmetric transparent BIST for memory using March X algorithm. International Journal of Engineering Science and Generic Research, 3(5). Retrieved from https://ijesar.in/index.php/ijesar/article/view/80

Issue

Vol. 3 No. 5 (2017)

Section

Articles

License

Creative Commons LicenseInternational Journal of Engineering Science and Generic Research (IJESAR) by Articles is licensed under a Creative Commons Attribution 4.0 International License.