Design and Implementation of FIR Interpolation Filter with Pipelining

Authors

  • V JAGAN MOHAN 1, Dr. S. BALAJI2, MUNI PRAVEENA RELA3 1 PG Scholar, Department of ECE, CMR Institute of Technology, Hyderabad, India 2(M.E (E.C.E), PhD. Professor), Department of ECE, CMR Institute of Technology, Hyderabad, India 3 Associate Professor, Department of ECE, CMR Institute of Technology, Hyderabad, India

Abstract

A filter of N tap with interpolation factor of R, N/R equivalent multipliers to implement the convolution operation between the inputs and the filter coefficients, and structural adders to perform the final addition operation for generating the output are required. Implementation of each standard’s filter while designing a root-raised-cosine finite-impulse response filter for multi standard DUC for three different standards.

Proposed designing root-raised-cosine finite-impulse response filter for multistandard DUC for five different standards. Implementation of five different filter lengths of 19, 25, 37, 49 and 97 with five different interpolation factors 3, 4, 6, 8 and 16 with pipelining simulated and synthesized by using Xilinx 14.7.

Index Terms: Digital up converter (DUC), FIR interpolation filter, RRC Architecture.

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Published

2017-04-28

How to Cite

MUNI PRAVEENA RELA3, V. J. M. 1, D. S. B. (2017). Design and Implementation of FIR Interpolation Filter with Pipelining. International Journal of Engineering Science and Generic Research, 3(2). Retrieved from https://ijesar.in/index.php/ijesar/article/view/67

Issue

Vol. 3 No. 2 (2017)

Section

Articles

License

Creative Commons LicenseInternational Journal of Engineering Science and Generic Research (IJESAR) by Articles is licensed under a Creative Commons Attribution 4.0 International License.