Kumar, Prabhat, and Kamal Niwaria. “16 Bit Design of Adder Subtractor Circuit With Optimized Quantum Cost Using Feynman, PFAG and WG Gate”. International Journal of Engineering Science and Generic Research 4, no. 4 (July 9, 2018). Accessed August 4, 2026. https://ijesar.in/index.php/ijesar/article/view/144.