VITTAL, 1 S. K. B. 2 K. Implementation of High Speed Single Error Correction–Double Adjacent Error Correction (72, 64) Codes. International Journal of Engineering Science and Generic Research, [S. l.], v. 3, n. 6, 2017. Disponível em: https://ijesar.in/index.php/ijesar/article/view/94. Acesso em: 18 apr. 2025.