TY - JOUR AU - Savithri, Gongali Reddy AU - Hariobulesu, P. PY - 2019/06/14 Y2 - 2024/03/29 TI - A NOVEL ARCHITECTURE FOR OPTIMIZED MBIST USING MARCHC ALGORITHM JF - International Journal of Engineering Science and Generic Research JA - IJESAR VL - 5 IS - 3 SE - DO - UR - https://ijesar.in/index.php/ijesar/article/view/165 SP - AB - <p>This&nbsp; paper&nbsp; will&nbsp; present&nbsp; a usage of MarchC algorithm to design&nbsp; flexible&nbsp; Memory&nbsp; Built- in&nbsp; Self-Test&nbsp; (MBIST)&nbsp; designed&nbsp; to&nbsp; be&nbsp; easily&nbsp; adaptable&nbsp; to&nbsp; specific memory&nbsp; configurations&nbsp; and&nbsp; user&nbsp; requirements, a flexible Memory Builtin Self-Test (MBIST) designed to be easily adaptable to specific memory configurations and user requirements. Its RTL code is generated by means of programming scripts that provide an easy to read code without the use of complex compiler directives. The basic architecture can be adapted to different schemes of test such as parallel, in which all the memories are tested concurrently, or sequential, in which the memories are tested one at the time. The basic architecture can be adapted to different schemes in which all the memories are tested concurrently, or sequential, in which the memories are tested one at the time using march C algoritham.</p><p>Index Terms— March C, memory built-in self-test, memory BIST, MBIST.</p> ER -