Design of Reconfigurable Architecture for 64-Point DCT
This paper presents a fully scalable reconfigurable parallel architecture for the computation of approximate DCT based on the algorithm. One uniquely interesting feature of the proposed design is that it could be configured for the computation of 32-point DCTs for parallel computation of two 16-point DCTs, four 8-point DCTs. We have proposed the computation of 64-point DCTs for parallel computation of two 32-point DCTs, four 16-point DCTs and eight 8-point DCTs. The Reconfigurable Architecture for 64-point DCT is simulated and synthesized by Xilinx 14.7.
Index Terms: DCT approximation, discrete cosine transform (DCT).
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International Journal of Engineering Science and Generic Research (IJESAR) by Articles is licensed under a Creative Commons Attribution 4.0 International License.