Design of Reconfigurable Architecture for 64-point DCT

Authors

  • M.PHANINDRA BABU 1, MADARAPU AJITHRAO 2 1 PG Scholar, Department of ECE, Brilliant Institute of Engineering and Technology, Hyderabad, India 2 Associate Professor, Department of ECE, Brilliant Institute of Engineering and Technology, Hyderabad, India

Abstract

We have presented a fully scalable reconfigurable parallel architecture for the computation of approximate DCT based on the algorithm. One uniquely interesting feature of the proposed design is that it could be configured for the computation of 32-point DCTs for parallel computation of two 16-point DCTs, four 8-point DCTs. We have proposed the computation of 64-point DCTs for parallel computation of two 32-point DCTs, four 16-point DCTs and eight 8-point DCTs. The Reconfigurable Architecture for 64-point DCT is simulated and synthesized by Xilinx 13.2 tool. Index Terms: DCT approximation, discrete cosine transform (DCT).

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Published

2016-10-30

How to Cite

2, M. B. 1, M. A. (2016). Design of Reconfigurable Architecture for 64-point DCT. International Journal of Engineering Science and Generic Research, 2(5). Retrieved from https://ijesar.in/index.php/ijesar/article/view/38

Issue

Vol. 2 No. 5 (2016)

Section

Articles

License

Creative Commons LicenseInternational Journal of Engineering Science and Generic Research (IJESAR) by Articles is licensed under a Creative Commons Attribution 4.0 International License.