DESIGN OF FIR FILTERS USING REVERSIBLE CIRCUITS

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G SANDEEP KUMAR SMITHASHREE MOHAPATRA

Abstract

FIR filter is helpful in several applications such as modern signal processing and communication systems.  In  this  paper  a optimized  FIR  filter  designed  by using  radix-4 multiplier based mostly   on  parallel   prefix   adder   is proposed.   This suggested   radix-4 multiplier designed with brentkung adder.  The parallel prefix adders provides the  less insertion delay, this results in increase within the high performance for the calculation within the less time. . The planned radix-4 multiplier is compared  with  a typical vedic multiplier  reduced critical  path delay by V-day.  This proposed multiplier improves the performance of the FIR filter. This Paper has been implemented in Xilinx ISE version 14.7.


Keywords:  Residue    Number    System    (RNS); Reversible Circuits; Modular Adder; Parallel-Prefix Adder.

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How to Cite
KUMAR, G. S., & MOHAPATRA, S. (2019). DESIGN OF FIR FILTERS USING REVERSIBLE CIRCUITS. International Journal of Engineering Science and Generic Research, 5(4). Retrieved from http://ijesar.in/index.php/ijesar/article/view/168
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