XOR FREE ADVENT OF CONVOLUTION ENCODER IMPLEMENTATION

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Jaladurgam Venkata Anjan Kumar P M Naseer Hussain

Abstract

This work presents a new algorithm to construct an XOR-Free architecture of a power efficient Convolution Encoder. Optimization of XOR operators is the main concern while implementing polynomials over GF (2), which consumes a significant amount of dynamic power. The proposed approach completely removes the XOR-processing operation of a chosen non-systematic, feed-forward generator polynomial and reduces the logical operators, thereby the decoding cost.


Index Terms: Convolution Codes, Common Sub expression Elimination, Finite State Machine, Forward Error Correction, FPGA, HDL, Modulo Adder.

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How to Cite
Anjan Kumar, J. V., & Hussain, P. M. N. (2019). XOR FREE ADVENT OF CONVOLUTION ENCODER IMPLEMENTATION. International Journal of Engineering Science and Generic Research, 5(2). Retrieved from http://ijesar.in/index.php/ijesar/article/view/160
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