The architecture which defines how data are transferred from one protocol to another. It exploits the flexible protocols of I2C to make it compatible with APB protocol. The architecture is a bridge between I2C Master and APB Salve. The data travels from a serial bus (I2C) to parallel bus (APB) to serial (I2C) in sync with the respective domain clock. This forms a bidirectional interface between I2C supported module and APB supported module, APB have low frequency .The proposed architecture is a bridge between I2C and AHB bus, this bridge communicate the High performance AHB parallel bus to I2C serial bus. Keyword: SCL, SDA, APB, AHB.