In Digital Signal Processing, the convolution and deconvolution with a very long sequence is ubiquitous in many application areas. The basic blocks inconvolution and Deconvolution implementation are multiplier anddivider. A direct method of computing the discretelinear convolution, circular convolution and deconvolution. The proposed method is the development of a multiplier and divider architectur ebased on Ancient Indian Vedic Mathematics sutras Urdhvatriyagbhyam and Nikhilam algorithm. The results show that the implementation of linear convolution and circular convolution using Vedic mathematics. The coding is donein VHDL. Simulation and Synthesis are performed using XilinxI SE design suit 13.2.
Keywords: Linear Convolution, Circular Convolution, Deconvolution, Vedic Mathematics, UrdhvaTriyagbhyam, Nikhilam, VHDL.